Renesas Electronics /R7FA6M2AF /USBHS /HL1CTRL1

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as HL1CTRL1

15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)L1REQ 0 (00)L1STATUS

L1STATUS=00, L1REQ=0

Description

Host L1 Control Register 1

Fields

L1REQ

L1 Transition Request

0 (0): This bit is cleared to 0 by hardware when the LPM transaction is completed.

1 (1): Set this bit to 1 when requesting a transition to the L1 state.

L1STATUS

L1 Request Completion Status

0 (00): ACK received

1 (01): NYET received

2 (10): STALL received

3 (11): Transaction error

Links

()